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(With some notes about the world's first.)

By Nicholas Bodley

(First, a "disqualifier". All of this comes from memory, and some material might be factually incorrect, but certainly not intentionally so. The author has had a very strong interest in the topic, and was careful to check facts as he learned them. It's all offered in good faith!)

Around 1963, advances in electronic technology made it practical to build and market an electronic desktop calculator. The world's first was the Anita C/VIII, made by Sumlock Comptometer Ltd. in London, England. The Anita had a beautifully-built full keyboard (each digit place had a vertical row of 9 keys, in a row extending toward and away from the operator. It had 10-digit input, which would imply 90 keys for digit entry.

The Anita's display used shaped-cathode neon glow numerical-indicator tubes, known among the technical community in the USA as "Nixie" tubes; this is a trademark, probably of Burroughs. The internal logic used small neon-glow thyratron tubes. Another variety of tube used in the Anita, called a Dekatron, had thirty cathodes. Only one cathode would have a glow discharge; a series resistor in the anode circuit kept the voltage below that required for other cathodes to conduct. Ten cathodes kept the count. The other twenty were connected into two groups of ten, and a two-phase clock stepped the glow to the next "stable" cathode in two stages by temporarily "stealing" the glow from the "stable" cathodes. A single Dekatron tube was used in the Anita as a keyboard scanner.

The Anita did all four functions, but because each digit was costly, it couldn't display all digits of a full product from a multiplication. This wasn't too bad if the operands were integers, but it did have decimal-point logic, and the decimal point sometimes appeared in a bizarre place when mixed operands were multiplied; it wrapped around the end, and popped up in a logical, but peculiar place.

Speed was of no particular consequence; an "all nines" multiplier caused no appreciable wait.

Around the same time Friden introduced the EC-130, Marchant brought out a nice, rather compact machine called the Cogito 240SR, that had a display like that of the Friden, but with peculiar half-size zeros that looked quite odd.

Monroe was the other of the "Mechanical Big Three" in nonprinting desktop calculators in the USA; they seemed to be late in bringing out an electronic desktop machine; however, they had a brilliantly-designed mechanical printing calc. that was a successful competitor to the EC-130. This was their model PC-1421.


This article is a set of recollections about a very significant product in the history of calculators. The author, Nicholas Bodley, was one of the original eight technicians to be trained at the factory on this calculator. It was a fascinating, exciting, and very memorable experience to see this calculator for the first time; it was beautifully styled. (IMHO, it lost a bit in the translation to production dies.)

Some general remarks

Friden had a wonderfully-capable engineer named Robert Ragen, one of the most brilliant people I have ever met, and a very pleasant, rather self-effacing fellow at that. I don't know to what degree he was responsible for the remarkably innovative architecture of the EC-130, but I do know he had a significant hand in the design.

In external appearance, the EC-130 was a very good-looking, highly distinctive, stylish, rather low box with a gracefully-curved top cover over the electronics, and a vertical panel (mostly blank) with an extended glare shield around the display face. The keyboard extended across the full width of the machine; it was a 10-key, serial-entry type, with various function/control keys on both sides. The keyboard panel sloped up toward the vertical front panel. The rear, as I recall, was a finned die-cast heat sink, although its power consumption was modest. Its "footprint" was about that of a fairly large electric typewriter, although perhaps extending farther toward the back of the desk. The list price was (in 1964) around $2,100.

When the EC-130 was designed, ICs were hopelessly expensive (I can recall a Westinghouse DTL-930 NAND gate, perhaps with four inputs, that cost a big chunk out of $50, apiece). The design was all discrete PNP germanium diodes and transistors; to duplicate the internal logic of one of today's calc. chips with discrete components would give you a rather large box, too big for a desktop, which might draw a few hundred watts, and cost probably $10,000. (These are very personal, rough guesses!)

Reverse Polish Notation (RPN)

This calculator preceded Hewlett-Packard's desktop machines, and was the first to use RPN. I'm almost sure that Friden also called it "RPN". No, it wasn't -hp- who first used RPN, and they have never claimed so. The EC-130 had a four-register visible stack functionally very close to that of the -hp- 48, for instance. A stack drop caused zeros to enter the top. Not sure, but I think it might even have had a "Last x" register, but not displayed. It had an Enter key that worked probably exactly like that on the -hp- calculators.


The characters were displayed on a 5-inch round, type 5DEP1 green-phosphor electrostatic-deflection CRT, with about 2 kV accelerating voltage. (All computer CRTs use magnetic deflection.) The characters were seven-segment, quite similar to those used universally in today's inexpensive LCD calculators.

The beam of the CRT was swept across the screen to write the strokes that made up the individual characters; it was a vector scan, not a raster scan. The deflection waveforms were wondrously complicated, and always the same. The characters were slanted; the slant was created by just one resistor that cross-coupled the vertical deflection into the horizontal, without a buffer amplifier; it was a marvelously simple yet subtle circuit. Somehow, there was no visible cross-coupling the other way. It didn't seem obvious from looking at the circuit how the isolation was done.

Individual digits were created by unblanking (turning on) the CRT beam at the appropriate times; the decoding matrix used a remarkably small number of diodes. (80 or so?) There was a decimal point visible in each register.

Decimal Points

Logic for a floating decimal point, universal in contemporary calculators, was too elaborate to include in a discrete-component design. The EC-130 did have decimal points and a decimal-point-entry key, but the display had a selectable fixed point, the same for all registers of the stack. The user had to decide how many decimal places s/he wanted to work with. There was a rotary switch with an edge wheel knob projecting through a slot; there were about six choices available. I have seen two different sets of [numbers of places] in different machines. The internal logic permitted any number of places within the limits of the machine; the switch was the limitation. Someone must have hacked a freely-selectable decimal selection at some time.

The machine had 13 digits, and by repositioning the decimal point, could provide all 26 digits of a product, as I recall. Overflow and/or truncation naturally occurred in such cases. It could work as a purely fractional or purely integral machine.

It did division as well, with about 2 seconds required for an all-nines quotient. An all-nines multiplier was a bit faster.


The keyboard was serial-entry, so-called 10-key. It had a unique mechanism, which was borderline practical as a design. Each keystem was part of a stamped piece of steel that included a "blade" with a rounded bottom edge. This edge extended from front to back, and pressing a key moved it down against ramp-shaped recesses in a number of code bars (made of stamped phenolic laminate, I think).

There were about 7 or 8 code bars; each had a small magnet attached to it, and the magnet operated a reed switch. As I recall, there were no return springs on the code bars; they were actuated positively in both directions. The "touch" was quite acceptable despite the oddity of the design. (The bars were positioned crosswise, of course.) One code bar was actuated for any of the ten digits, and reset for other keys. The terms "common function" and "common digit" were frequently used by the tech. folk. There probably was a code bar specifically to distinguish digits from non-digits.

There was a small, fast electromagnet with an armature that locked the codebars in place (and locked down the keys as well; I have forgotten how) until a time-consuming operation such as multiply or divide was complete. It always was pulsed, but most operations were quite fast, and it served as a keyclick noisemaker most of the time. It also could lock the keyboard when a malfunction happened; it wasn't rare for a defective machine to have its multiplication key lock down and stay as soon as you pushed it.

All functions and digits were coded, although with specific codes that made for minimal component count in the electronics.

Internal Storage

At the time it was designed, the EC-130 required too many digits of internal storage to permit use of discrete-component flip-flops for data; indeed, all of the early desktop calcs faced the same constraint. Static

RAM ICs came quite a few years later, I think a few years after the heyday of serial shift-register ICs. (Toshiba's first electronic calculator, the "TOSCAL" BC-1411 machine that came out a few years after the EC-130 used discrete capacitors, with refresh circuits; the basic priciple was that of dynamic RAM! Shades of the Atanasoff-Berry machine...)

Friden used a low-cost version of the wire (ultra)sonic delay line, a truly serial type of storage. These devices were used in expensive systems for mass storage of binary data, with tight control over delay time and clock frequency. Apparently, the idea was to make the delay time some large multiple of the clock period, within a fraction of one period. Friden took a simpler approach. Once all the digits had been clocked into the delay line, the timing chain (cascaded binary counter stages) did a carry (overflow) out the most-significant flip-flop, and shut down the clock, so to speak (the oscillator continued to run, but...).

The first pulse written onto the line was a dummy pulse; when it came out of the line (I think the delay time was about 2.1 milliseconds) again, it effectively restarted the clock. Short-term drift was accounted for, and kept within good bounds. The timing chain actually had three fast stages run by the oscillator; these were, as I recall, jammed to zero by the start pulse to force the apparent clock phase to be in step with the start pulse and succeeding data. This is a known technique, probably embedded inside every UART chip. I'm not at all sure any more, but I seem to recall that the oscillator ran at around 650 kHz. The actual clock rate would have been 1/8 of that.

Of course, the pulses on the line were retimed and rewritten with the "latest" clock frequency, so modest medium-to-long term drift was of no consequence. There was a fairly-large timing gap between the last digit written and the start pulse, to allow for a long-term droop in clock frequency. (The oscillator used a discrete, molded inductor and maybe a couple of silvered-mica capacitors; maybe a Colpitts circuit. Quartz crystals weren't needed, and ceramic resonators were maybe 25 years in the future.)

The line itself was a subassembly on the bottom of the calc., with the wire in a large-radius (8" or so) flat helix/spiral of roughly a dozen turns or so. The wire itself was simply carefully-selected mild steel; no exotic alloy or such was needed. It was supported by soft silicone rubber sheets with punched holes and loading slits. This whole affair sat in a shallow sheet aluminum tray-like chassis with a huge hole on the center.

This type of delay line uses torsional pulses that last a very few microseconds, if even that long. They are twists; their angular magnitude is probably substantially less than one degree of arc, and if they were even as small as seconds of arc, I'd not be surprised. They also probably involve relatively high stress. It turns out that several thousand such pulses can be launched into a piece of wire, and they don't disperse much; they remain separate at the far end. Whether soliton phenomena are involved, I don't know. (Maybe the original designers didn't, either! I think solitons are a fairly recent discovery.)

Launching such pulses is done with magnetostrictive tapes (pure nickel, probably) welded carefully to the exact end of the wire. They are tangential to the surface, and at right angles to the length of the wire. Imagine the wire being held vertically. The tapes would be horizontal, with their edges at top and bottom. If you hold a pencil or pen between thumb and forefinger, and let it droop, the pen/cil is the wire, and the tapes are your digits. (pun?) My recollection is that each side of the wire used two tapes for engineering reasons.

These tapes were passed through the bobbins of two quite-tiny coils, and a permanent bias magnet was positioned close to the coils. The magnet's field made the tapes shorter by (perhaps) a few parts per million than they would be without the field. Pulses to the coils canceled the field for one tape, and doubled it for the other. In probably several hundred nanoseconds, the longitudinal stress pulses had traveled to the end of the delay wire, where they gave it a sudden twist followed a microsecond or two later (roughly) by a relaxation to normal. The stress pulses in the tapes that traveled the other way would reflect from the ends of the tapes; a few sheets of silicone rubber clamped onto the tapes (actually a support as well) absorbed them.

Later calculator designs that followed (no display, just a vertical stack of four lamps to show non-zero contents) used IC logic and a smaller-diameter coil; the tape(s) were "single-ended" instead of the push-pull arrangement described. Apparently they worked quite well enough. These machines had the Singer logo on them.

At the other end of the delay wire, a transducer similar to the launch transducer converted the torque pulses to longitudinal ones, and the inverse magnetostriction effect plus another permanent magnet developed a decent signal in another pair of tiny coils.

Pulses coming off the line had a shape reminiscent of a sombrero; the wavelet sombrero function looks similar, as well as I can recall. Someone has a more-formal name for these, perhaps. The pulse takes a negative-going rounded dip, returns and crosses the zero axis, continues to a peak maybe three or four times as high as the dip, and then falls back to a second dip like the original. It settles quickly afterward. Simple gain stages and a slicer convert such a pulse to a clean rectangle at logic level.

Internal Data Representation

Surprise! The internal representation of the digits was *not* BCD! It wasn't really coded, at all; it was radix-one! (Well, once on the wire, at least...) The digits one through nine were represented really simply by consecutive pulses, with the pulse count equal to the digit being represented. A two was two pulses; a nine, nine pulses. Each digit was given its own time slot in the total data time (1.9 ms, perhaps?). If there were no pulses occurring at a given time, then that digit was zero.

Remember that the timing [counter] chain was started by the first pulse out of the line after an "end-around-carry" stopped the counters. This, combined with good short-term stability of the clock, meant that the "number" in the counter chain defined the identity of the digit.

I no longer recall how many internal 13-digit numbers were kept in the calculator; there were the four stack registers, all displayed. I think there were two, possibly three others, not displayed. One was, I think, a "last x" register, but I'm not sure. There was at least one register not displayed, I do know. I think there was space to store one 13-digit number; I seem to recall Store and Recall keys.

The numbers were written onto the delay line in a sequence with probably the "hidden" registers first, then progressively up the stack; all LSDs were written before the next digit. Decimal points were not stored, I'm fairly sure; their location made no difference in addition and subtraction; multiply and divide decimal settings simply affected where the result digits were placed.

Surprise, again! Once in the electronics, the digits took on another unusual form. Third surprise, before I explain the second; this is so unexpected that I'll put it as "all caps": THERE WAS NO ADDER IN THIS CALCULATOR! Not in the conventional sense, anyhow. You might well expect 8,4,2,1 BCD, or excess three, or 4,2,2',1, or some such coding, with a 4-bit combinatorial adder. Nope.

In the electronics, digits were represented by a code reminiscent of the Morse code for the digits; this code is and has been used elsewhere; there are, or were, ICs that counted in this code. It looks like this, really a simple scheme; it's a nonweighted code:

      0  00000
      1  00001
      2  00011
      3  00111
      4  01111
      5  11111
      6  11110
      7  11100
      8  11000
      9  10000

(Should we call this the baklava code?)

This code had a disadvantage of 22 disallowed states, but in the calculator, it permitted a fast bit rate on the delay line and low-cost logic to count the pulses coming off the line. The counter logic for this code is particularly simple; I think it is called a Johnson counter, also a "switch-tail ring counter". It's basically a 5-bit shift register with a parallel reset for all stages to set it to zero. The normal and complement serial outputs are connected back to the inputs, but with a half twist, so that a zero going out one end shifts in as a one at the other.

The code bars in the keyboard defined the ten digits by this code; A "common digit" signal being asserted, which signified that the code was to be interpreted as a digit. At the proper time, this digit was read into the

arithmetic unit in parallel.

Arithmetic Unit

Here, I'll attempt to show the arrangement of the four 5-bit flip-flop arrays, with one block for each group of five.

                  +--+          +--+     +--+
                  |  |          |  |     |  |
Serial input -+-->|A |=========>|B |====>|C |-----> Serial output
from delay    |   |  |          |  |     |  |       to delay line
line          |   +--+          |  |     +--+
              |                 |  |
              |   +--+          |  |
              |   |  |          |  |
              +-->|D |=======(>)|  |
                  |  |          |  |
                  +--+          +--+

(I'm not sure, but I think [A..D] are Friden's designations.)

A few notes on the illustration: The single lines are serial data paths; the inputs to the A and D counters are logic pulses from the delay line's read amplifier. These pulses (when enabled by gates, which is usually) cause the A counter to count up, and the D counter to count down. (Subtraction!) Likewise, the C counter feeds pulses serially to the delay line's write amplifier until it counts down to zero.

The = signs represent 5-bit parallel data paths; when enabled, the contents of a given counter/register shift to the right, into the "new" c/r. This happens every time a digit comes out of the delay line.

When the calculator is just sitting there, for each digit, the A counter gets reset; then the serial pulses from the delay line's read amplifier make it count up. (The D counter probably counts (down) as well, but nothing is done with its contents.) At the end of this time slot, the contents of A shift in parallel into B The next digit time, the digit in B shifts into C. The next digit time after that, clock pulses to the C counter make it count down and feed serial pulses to the delay line until it counts to zero.

The D counter's output is usually gated off; it doesn't go to the B register. (That's why I put the > in parentheses; it does look odd.)

To do an addition, the A counter is not reset when it usually would be, and the next digit from the delay line causes its count to increment "on top of" the count already there. If it counts past nine, logic detects the fact, and a carry flip-flop is set. (There's extra logic to account for carries caused by a carry.) At the next digit-column time, the logic increments the A counter by one, to add in the carry. Similar things take place during a borrow in subtraction.

There is at least one path not shown for parallel transfers. My memory isn't clear about this, but I think there is a bypass around the B register that feeds the contents of the A counter directly to the C counter. This makes a digit return to the line, but one (register) time earlier than usual. The end result is that the stack drops. Stack lift involves an extra delay; I think the D counter serves as a plain register (i.e., not a counter) for that, again using paths not shown. A given digit would probably take the path (line) to A to D to B to C to (line).

Subtraction, as I said "prematurely", involves decrementing the D counter; it's connected/defined as such. I really don't recall the details, but they're not any great mystery. None of the three counters is bidirectional.

(Incidentally, I've shifted to the present tense; it's one less complication. But not for long...)

Multiplication involved an extra (time-defined) 13-digit register, I'm reasonably sure; it might even have involved shifting out multiplier digits from one end, and shifting product digits into the other; the MQ registers of 1970s-era computers come to mind. The D counter might well have controlled the number of addition cycles. Needless to say, the control logic was fairly complicated, yet as simple as possible (every resistor, capacitor, diode, and transistor counted when determining cost).

Division was as expected, doing consecutive subtraction (and tallying the number of subtraction cycles) until underflow, followed by a restoring add, then a shift.


Control was of the state-variable variety (if I correctly understand what that implies); I have a dim recollection of a 3(?)-bit control counter that advanced when the next detailed stage of an operation was ready to take place. There was no explicit diode matrix in one spot for decoding logic states along with the contents of the counter; the logic was simply embedded. Memory is extremely sketchy about this, but square root definitely was added (details at the end of this article), and just possibly the control counter had to gain another bit.


Most transistors were 2N1305s, germanium PNP, in a TO-5 can. Faster ones were 2N2635s (TO-18), I think; and the deflection output stages were 2N3866s, I think; I know they were a popular RF power transistor. Logic diodes (DTL) were 1N662s, fairly sure. The circuitry was highly optimized; each collector load resistor and each of the base resistors was individually calculated; they were probably 1/2 watt Allen-Bradley carbon comps. (I don't think 1/4W; not sure.) Capacitors were chocolate-colored dipped mica, mostly, also individually "calculated".

The CRT's high-voltage power supply was, as I remember, an inverter; I think it had a small transformer like a low-powered vacuum-tube audio output transformer connected "backwards", and a voltage multiplier chain. The main logic power was quite conventional.

Again, memory fades, but I believe there were about 165 logic gates; perhaps 40 flip-flops in all; the timing chain had 14, I think.

There were seven circuit boards, approx. 12 inches by 5 inches; six were paired with spacers and (amazingly) lots of hand-soldered jumpers to join the two at the edges opposite the connector edge. One connector served two boards in a pair. As to layout, they were mostly rather closely packed. I think the A through D counter/registers occupied either one board or one pair. The boards were in a vertical plane, and plugged downward into edge connectors; no surprises.

This machine no doubt served as the inspiration for the Hewlett-Packard desktop calculators; I remember how amazed I was to read about their scientific desktop machine, which had no ICs, either; details were in the Hewlett-Packard Journal at that time. (Also reprinted in a book.) That -hp- machine (the 9100A) was quite as remarkable in its own right, as was the Friden.

A Manufacturing Note

The circuit boards were double-sided, with plated through-holes. The usual sequence was done: drill, then plate the holes. However, the pattern of traces was done by reverse electroplating in a unique machine developed by the inventor Gilbert Marosi. The machine had a copper negative master wrapped around a drum and clamped. The drum was rotated in close registry with the drilled and plated copy, while electrolyte was flushed trhough a very small gap between the master and the copy. The liquid went in clear, and came out blue. The copper was immediately extracted and the electrolyte reused. The current must have been quite high, perhaps hundreds of amps.

When it worked, it worked quite nicely. The remaining copper that had disconnected itself electrically was removed with a quick etch.

However, there was a nasty problem. The process of plating the through-holes created low anthill-like raised regions around the holes. These would be of no consequence, but they shorted out the Marosi machine. The result was significant damage to the master; apparently it wasn't easy to stop the current before the damage was done. (Multi-hundred-ampere transistors were still in the future.)

Manufacturing was, one would presume, in a major quandary. They apparently had to use the machine; setting up a conventional photoresist/etch line couldn't be done in a few days. They decided to follow the plating step with a surface grind of the unpatterned boards. I don't know about surface grinding copper, but they apparently almost knew how (if, indeed, anyone does). The consequences were horrible. The circuit boards would work fine until they were shipped to the branch offices, and even sometimes reach the customer's premises. Then the failures would begin. The surface grinding would damage the copper, breaking the plating inside the hole away from that on the surface.

It fell to me to be the East Coast "depot" service technician, or at least Northeast. We had commendably few actual part failures; about 98% of the failures were due to the consequences of surface grinding. They were mechanical intermittents. We would get a set of boards in, plop them into a test machine (stock, but with extenders for all boards), have a look, and start warping the boards. We saw some wondrously-peculiar symptoms; considering the architecture, they were more interesting than a more conventional architecture would have offered.

If we found more than, perhaps two definite symptoms, we opened up the pairs, and I painstakingly hand-soldered every through-hole on every board, with great attention to technique. I still recall a gold-plated transistor lead that was surrounded by a perfectly-good looking fillet of solder. Of course, the lead went thru the board to a pad on the opposite side; that pad connected to some other circuits. The lead was not connected, however, to the pad on the component side, even though it was surrounded with a perfect-looking fillet. There must have been a very thin layer of rosin or other insulator on the lead, and the component-side pad had broken away completely from the plating in the hole. Solder continuity from bottom to top didn't help in this case.

My boss, a decent fellow, finally had me transferred to Friden R&D in Rochester, which is another interesting tale I may tell someday. Somewhat sad; lost opportunity, but also mismanagement.

R&D was an instance of youth being wasted on someone young, and ended (back in 1966, I think) with early corporate downsizing/R&D cutbacks. It hit me early! Singer had bought Friden about the time I first went to work for them, and progressively destroyed a very good company.

One particularly interesting highlight of my time in Rochester, that would be of interest to an old-timer, is that back in 1964, Friden was unofficially developing an electronic Flexowriter. It retained the basic electric typewriter mechanism, and even had a bus architecture, which was something quite advanced at that time. as I recall. I wasn't directly involved with the project. It would have made a considerable difference in the product lifetime of the Flexowriter, but management was, you guessed it. Adding to the pain was that the prototype was built with multipin connectors that turned out to be miserably unreliable. (They looked great, but didn't work.) The resident genius, Dave Frick, independently conceived of static RAM chips, and perhaps dynamic ones as well. This was when the first prototype dual-inline packages appeared, and it looked so stupid to standardize on a package that could be inserted backwards.


Referring to the preceding article about the EC-130, after I left depot maintenance on the EC-130, Friden introduced the EC-132, which offered a different selection of the number of decimal places, and added square root. Square root was important to Friden; their mechanical model SRW did square root (it used the "fives" algorithm; I have described the details in another article), and their mechanical masterpiece, the model SRQ, did both squaring and square root. Squaring was trivial on the EC-130; I'm not sure that the EC-132 didn't also have a squaring key.

The internal architecture of the EC-132, as the model number implies, was the same, but simply elaborated some. However, the algorithm was something probably new to that machine. I don't know about more-modern calculators, but it makes sense to elaborate the division logic (or algorithm) to calculate square root by a process something like division, except that the "divisor" is constantly incrementing in a controlled fashion, instead of remaining static. While the details of square root calculation become a bit messy, the general scheme for incrementing the "divisor" is worth describing.

It's been known for a long time that the sums of the odd integers are the squares of integers. A few examples make that much clearer.

1 = 1 squared

1 + 3 = 2 squared

1 + 3 + 5 = 3 squared, etc.

This fact is the basis of "direct" square root calculation; the messy details involve shifts and preserving existing digits of the root as they develop, along with the developing "divisor", which gains another digit every time a root digit is found. (When I say "direct", I have in mind Newton's method, which progressively refines an initial estimate. That algorithm is thoroughly impractical for a calculator of that era, and is probably not a good one for any calculator. I could be wrong, but what's taught in school sometimes differs wildly from the Real World.)

In the EC-130, incrementing a register by twos isn't easy; it becomes even more messy when the developing root digit becomes large, and a 9 has to be incremented to an 11. The two-place representation of the current "divisor" digit becomes perticularly messy, I'd guess.

Friden came up with another scheme; people aren't generally in a blinding hurry for their square roots. Division involves repeated subtraction of a constant divisor; square root is similar, but the "divisor" increments, as I've said. Friden decided to subtract 1, first. If no overdraft, then subtract three; but, to create three, they didn't simply subtract three. They subtracted one, and then subtracted one more than that, in a second cycle. This "one more than that" scheme (my term), and doing a pair of subtractions, for each increment of a root digit, was the key.

Each subtraction cycle of division was now elaborated into a pair of subtraction cycles; every single cycle, the "divisor" was incremented by one. Incrementing became much simpler as a result.


Let's assume we want the square root of 16.

16 - 0 = 16 (Overdraft not possible)

Subtract one more than (zero): Take

16 - 1 = 15. This has now effectively subtracted 1. If no overdraft, increment the "divisor", which now becomes 1. Also tally one count for the root digit.

Now, do this:

15 - 1 = 14

and subtract one more than the 1,

14 - 2 = 12. This pair of subtractions has now effectively subtracted 3. If no overdraft, increment the "divisor" again, which becomes 2, and continue. Increment the tally for the developing root digit.

12 - 2 = 10

then subtract one more than 2:

10 - 3 = 7 This pair of subtractions has effectively subtracted 5.

There's still no overdraft, so increment once again, to make the "divisor" become 3. Increment the root digit again.

7 - 3 = 4

and subtract one more than 3,

4 - 4 = 0 No overdraft yet, so increment the root digit once again.

There have been four pairs of subtractions; each time a pair created no overdraft, the tally was incremented, and now stands at four. The "divisor" also equals four in this instance; the calculation is complete.

This example shows that incrementing by one with proper controls can calculate by the "consecutive odd integers" method. It's a simplified case; in real life, that nice zero remainder would probably be ignored, handy as it looks, because it's a rare case. Most square root calculations leave a remainder (although no calc. I know of ever makes that remainder available to the user; it wouldn't be of much use). In real life, the

incrementing process would continue, the subtraction would cause an overdraft, and the overdraft would tell the control logic to get ready to calculate another root digit. I doubt that the incrementing "divisor" would be useful in all cases for representing the most-accurate root; I might be wrong.

In the logic, that repeated "one more than" probably was represented by an extra pulse fed to either the A or the D counter after the digit in it was passed on to be rewritten to the delay line. However, I'm speculating, here.